Design Verification Engineer

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• Verify designs for DRAM (e.g., LPDDR4/5, DDR4/5, HBM) protocol compliance and functionality through rigorous testing and simulation.
• Develop and execute design verification plans to ensure functional correctness and compliance with specifications.
• Perform power-aware simulations and ensure low-power design compliance using UPF (Unified Power Format) standards.
• Develop and maintain reusable verification environments, including testbenches and test cases, using industry-standard methodologies (e.g., UVM).
• Debug functional errors in the RTL model using simulation and debug tools with an in-depth understanding of the DRAM protocol and memory controller microarchitecture.
• Define and implement functional coverage.
• Perform coverage analysis and identify testing gaps.
• Develop test plan and testcases from specification document.

Requirements:

• Possess at least 3 years experiences in USB/USB2.0/USB3.0
• Strong coding with Verilog and System Verilog.
• Good knowledge of design verification methodology UVM.
• Experiences with sequence creation, functional cover groups and assertion coding.
• Familiar with scripting language, such as Perl, C shell, Makefile, Ruby,Bash, TCL.
• Familiar with AMBA protocols i.e. AXI, AHB, APB etc.
• Understanding of low power design techniques (clock gating, power gating etc

• Seniority level Mid-Senior level

• Employment type Full-time

• Industries IT Services and IT Consulting

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Information :

• Company : ThunderSoft
• Position : Design Verification Engineer
• Location : Penang
• Country : MY