SOC Design Manager

Team Leadership:

Guide and manage a team of front-end design engineers, offering technical advice, supporting their career growth, and providing performance feedback.

Design Oversight:

Oversee the entire chip design process, from initial requirements and architecture to RTL design, verification, and support for back-end implementation.

Strategic Collaboration:

Work closely with product managers, architects, and customers to define chip specifications that align with both business and technical goals.

Project Management:

Create and manage project plans, track progress, identify and mitigate risks to ensure projects meet deadlines and quality standards.

Technical Direction:

Make key technical decisions regarding microarchitecture, IP selection, and design trade-offs (e.g., performance, power, area).

Process Improvement:

Develop and refine design methods, tools, and workflows to boost team efficiency and design quality.

Cross-Functional Coordination:

Collaborate with verification, physical design, software, and testing teams to ensure smooth integration and successful chip tape-outs.

Quality Assurance:

Review design deliverables, participate in technical reviews, and ensure compliance with design standards and best practices.

Industry Awareness:

Stay current with industry trends, new technologies, and competitor activities in chip design to inform technical strategies.

Reporting:

Prepare and present project updates, technical documents, and design reviews to internal stakeholders and senior management. The Successful Applicant

Education:

A Masters (MSEE) or Bachelors (BSEE) degree in Electrical Engineering, Microelectronics, or a related field.

Experience:

At least 10 years of hands-on experience in ASIC/SoC design, including a minimum of 3 years in a chip design people management role.

Technical Proficiency:

Strong expertise in RTL design (Verilog/System Verilog), FPGA prototyping, simulation, synthesis, and timing analysis.

SoC Knowledge:

Familiarity with SoC architecture, IP integration, and bus protocols like AMBA, AXI, and PCIe.

Project Leadership:

Proven experience leading end-to-end chip design projects, with a preference for 5 or more successful complex chip tape-outs.

Design Flow Understanding:

A solid grasp of the complete ASIC design flow, from requirements to tape-out, including interactions between front-end and back-end processes.

Tool Skills:

Proficiency in design tools (e.g., for simulation, synthesis, verification) and scripting languages (e.g., TCL, Perl).

Leadership & Mentoring:

Excellent leadership, team management, and mentoring skills, with a proven history of developing engineering talent.

Communication:

Strong verbal and written communication skills in both English and Chinese, with the ability to clearly explain technical concepts to diverse audiences.

Problem-Solving:

Demonstrated ability to handle multiple priorities, solve complex problems, and deliver results in a fast-paced environment.

Experience leading designs for high-performance applications (e.g., AI, automotive, or mobile).

Knowledge of low-power design techniques, advanced process nodes, or emerging memory technologies.

Familiarity with verification methodologies (e.g., UVM) and formal verification tools. Whats on Offer

Exciting new setup in the semiconductor world Part of a renowned organisation relative to the Automotive Industry ContactTristan VoonQuote job refJN- Phone number #J-18808-Ljbffr

Information :

• Company : Businesslist
• Position : SOC Design Manager
• Location : Kuala Lumpur, Kuala Lumpur
• Country : MY