Embedded Engineer at Lattice Semiconductor

Position Embedded Engineer
Posted 2025 December 01
Expired 2025 December 31
Company Lattice Semiconductor
Location George Town | MY
Job Type Full Time
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Job Description:

Latest job information from Lattice Semiconductor for the position of Embedded Engineer. If the Embedded Engineer vacancy in George Town matches your qualifications, please submit your latest application or CV directly through the updated Jobkos job portal.

Please note that applying for a job may not always be easy, as new candidates must meet certain qualifications and requirements set by the company. We hope the career opportunity at Lattice Semiconductor for the position of Embedded Engineer below matches your qualifications.

Lattice Overview There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for. Responsibilities & Skills

Job Overview: We are seeking a talented Embedded Engineer to join our Solutions Engineering team, specializing system integration, system validation, and hardware testing. The ideal candidate will support the design and optimization of RTL intellectual properties (IPs) for industrial/automotive applications such as industrial networking, motor control, IO aggregation, and protocol conversion. This role involves close collaboration with software teams to ensure seamless HW/SW integration and rigorous validation to meet performance, power, and usability requirements. As a Senior Engineer, you will contribute to scalable hardware solutions and begin influencing small project scopes within the team. Key Responsibilities: RTL Design:

Extend existing RTL designs to add functionality, generalizing designs to be compatible with broader application.

System Integration:

Integrate RTL designs with RISC-V software stacks and drivers, ensuring compatibility and performance in FPGA-based systems.

System Validation:

Design and execute validation processes to verify system functionality, robustness, and performance, including protocol compliance for communication interfaces.

Hardware Testing:

Conduct hardware testing for power efficiency, signal integrity, and usability, refining test methodologies to improve validation accuracy.

Optimization:

Optimize RTL designs for area, power, and performance to meet industrial application requirements.

Documentation:

Maintain detailed design and validation documentation to support team collaboration and customer integration.

Process Improvement:

Propose refinements to validation and testing processes to enhance development efficiency and solution reliability.

Business Impact Deliver reliable and scalable RTL designs that support the development of robust FPGA-based solutions for industrial/automotive applications.

Enhance development efficiency by refining validation and testing processes, reducing defects and time-to-market.

Support the company’s scalability goals by creating optimized hardware IPs that meet customer performance and usability needs.

Required Skillsets Technical Expertise: Proficiency in RTL design (VHDL/Verilog) for FPGA platforms, with hands-on experience in simple communication protocols (UART, SPI, I2C). Proficiency in System Verilog for system and IP validation. Ability to develop tests and testbenches.

Tools: Familiarity with FPGA development tools and simulation environments (e.g., ModelSim).

System Integration: Experience integrating RTL designs with software components, particularly RISC-V architectures.

System Validation & Testing: Knowledge of hardware testing for functionality, power efficiency, signal integrity, and usability, with a focus on protocol compliance.

Optimization: Skills in optimizing RTL for area, power, and performance in embedded systems.

Problem-Solving: Ability to debug and resolve hardware design and integration challenges.

Communication & Influence Expectations Technical Communication: Present design proposals, validation results, and test findings to the team in clear, concise reports or meetings.

Collaboration: Work closely with software engineers and other hardware team members to align on system integration and testing goals.

Influence: Suggest improvements to design and validation processes, influencing the scope of small projects or tasks within the team.

Documentation: Produce high-quality documentation to facilitate knowledge sharing and support customer-facing deliverables.

Qualifications Education: Bachelor’s degree in Electronics, Electrical Engineering, Computer Engineering, or a related field; Master’s degree preferred.

Experience: 4–7 years of hardware engineering experience, with at least 2 years focused on RTL development for FPGAs and familiarity with simple communication protocols.

Preferred: Experience with industrial applications (e.g., CAN, Modbus) and RISC-V core integration.

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Job Info:

  • Company: Lattice Semiconductor
  • Position: Embedded Engineer
  • Work Location: George Town
  • Country: MY

How to Submit an Application:

After reading and understanding the criteria and minimum qualification requirements explained in the job information Embedded Engineer at the office George Town above, immediately complete the job application files such as a job application letter, CV, photocopy of diploma, transcript, and other supplements as explained above. Submit via the Next Page link below.

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